Device tree

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Device tree for i.MX6UL

Generic device tree source file is imx6ul.dtsi where you can find complete configuration for i.MX6UL CPU.

imx6ul.dtsi file is included by imx6ul-litesom.dtsi where you can find minimal configuration for liteSOM module. This file can be included in all liteSOM based projects.

In our case we are including imx6ul-litesom.dtsi file in imx6ul-liteboard.dts which is a complete configuration for our liteSOM based liteboard.

Based on imx6ul-litesom.dtsi and imx6ul-liteboard.dts files you can customize any liteSOM/liteboard based project to fit into your project requirements.

For example you can check out imx6ul-liteboard-lcd-res.dts example where liteboard is configured to support 800x480 LCD panel with resistive touchscreen.

Pin Mux configuration

Almost all i.MX6UL pins can be configured to provide one of the predefined functionality, for example via SW_MUX_CTL_PAD_ENET1_TX_DATA0 register you can configure IOMUXC_SW_MUX_CTL_PAD_ENET1_TX_DATA0 to work as:

  • ENET1_TDATA00 - controlled by enet1,
  • UART5_CTS_B - controlled by uart5,
  • ANATOP_24M_OUT - controlled by anatop,
  • CSI_DATA19 - controlled by csi,
  • FLEXCAN2_RX - controlled by flexcan2,
  • GPIO2_IO03 - controlled by gpio2,
  • KPP_COL01 - controlled by kpp,
  • USDHC2_VSELECT - controlled by usdhc2.

Correct Pin Mux mode must be configured by device tree file; for example in imx6ul-liteboard.dts file this pin as configured to work in ENET1_TDATA00 mode.

&iomuxc {
	pinctrl_enet1: enet1grp {
		fsl,pins = <
			[...]

			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0

			[...]
		>;
	};
};

To check all possible port ↔ mode combinations please check imx6ul-pinfunc.h file where all allowed configurations are already defined.

Remaining bitmask 0x1b0b0 will be used to configure SW_PAD_CTL_PAD_ENET1_TX_DATA0 register. If you want instead of hex value you can build this bitmask via predefined values defined in fsl,imx6ul-pinctrl.txt file.