LCD configuration

From liteSOM Wiki
Jump to: navigation, search

LCD configuration

Pinout configuration

LCD data & synchronization configuration

Presented below device tree file snippet will configure pads:

  • LCD data signals:
    • LCD_DATA0/PWM1_OUT/ENET1_1588_EVENT2_IN/I2C3_SDA/GPIO3_IO05/SRC_BT_CFG00/SAI1_MCLK (pad 142 on liteSOM) - as LCD DATA0 signal,
    • LCD_DATA1/PWM2_OUT/ENET1_1588_EVENT2_OUT/I2C3_SCL/GPIO3_IO06/SAI1_TX_SYNC (pad 141 on liteSOM) - as LCD DATA1 signal,
    • [...]
    • LCD_DATA23/MQS_LEFT/ECSPI1_MISO/CSI_DATA15/EIM_DATA15/GPIO3_IO28/SRC_BT_CFG31/USDHC2_DATA3 (pad 115 on liteSOM) - as LCD DATA23 signal,
  • LCD synchronization signals:
    • LCD_CLK/LCDIF_WR_RWN/UART4_TX/SAI3_MCLK/EIM_CS2_B/GPIO3_IO00/WDOG1_WDOG_RST_B_DEB (pad 150 on liteSOM) - as LCD CLOCK signal,
    • LCD_ENABLE/LCDIF_RD_E/UART4_RX/SAI3_TX_SYNC/EIM_CS3_B/GPIO3_IO01/ECSPI2_RDY (pad 147 on liteSOM) - as LCD ENABLE signal,
    • LCD_HSYNC/LCDIF_RS/UART4_CTS_B/SAI3_TX_BCLK/WDOG3_WDOG_RST_B_DEB/GPIO3_IO02/ECSPI2_SS1 (pad 148 on liteSOM) - as LCD HORIZONTAL SYNC signal,
    • LCD_VSYNC/SAI3_RX_SYNC/LCDIF_BUSY/UART4_RTS_B/SAI3_RX_DATA/WDOG2_WDOG_B/GPIO3_IO03/ECSPI2_SS2 (pad 146 on liteSOM) - as LCD VERTICAL SYNC signal.

Backlight

  • GPIO1_IO09/PWM2_OUT/WDOG1_WDOG_ANY/SPDIF_IN/CSI_HSYNC/USDHC2_RESET_B/GPIO1_IO09/USDHC1_RESET_B/UART5_CTS_B (pad 29 on liteSOM) - as PWM2 OUTPUT signal.

Touchscreen configuration

  • GPIO1_IO01/I2C2_SDA/GPT1_COMPARE1/USB_OTG1_OC/ENET2_REF_CLK2/MQS_LEFT/GPIO1_IO01/ENET1_1588_EVENT0_OUT/SRC_EARLY_RESET/WDOG1_WDOG_B (pad 37 on liteSOM) - as resistive touchscreen signal,
  • GPIO1_IO02/I2C1_SCL/GPT1_COMPARE2/USB_OTG2_PWR/ENET1_REF_CLK_25M/USDHC1_WP/GPIO1_IO02/SDMA_EXT_EVENT00/SRC_ANY_PU_RESET/UART1_TX (pad 36 on liteSOM) - as resistive touchscreen signal,
  • GPIO1_IO03/I2C1_SDA/GPT1_COMPARE3/USB_OTG2_OC/OSC32K_32K_OUT/USDHC1_CD_B/GPIO1_IO03/CCM_DI0_EXT_CLK/SRC_TESTER_ACK (pad 35 on liteSOM) - as resistive touchscreen signal,
  • GPIO1_IO04/ENET1_REF_CLK1/PWM3_OUT/USB_OTG1_PWR/ANATOP_24M_OUT/USDHC1_RESET_B/GPIO1_IO04/ENET2_1588_EVENT0_IN/UART5_TX (pad 34 on liteSOM) - as resistive touchscreen signal.
&iomuxc {
	pinctrl_lcdif_dat: lcdifdatgrp {
		fsl,pins = <
			MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
			MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
			MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
			MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
			MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
			MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
			MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
			MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
			MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
			MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
			MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
			MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
			MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
			MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
			MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
			MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
			MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x79
			MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x79
			MX6UL_PAD_LCD_DATA18__LCDIF_DATA18  0x79
			MX6UL_PAD_LCD_DATA19__LCDIF_DATA19  0x79
			MX6UL_PAD_LCD_DATA20__LCDIF_DATA20  0x79
			MX6UL_PAD_LCD_DATA21__LCDIF_DATA21  0x79
			MX6UL_PAD_LCD_DATA22__LCDIF_DATA22  0x79
			MX6UL_PAD_LCD_DATA23__LCDIF_DATA23  0x79
		>;
	};

	pinctrl_lcdif_ctrl: lcdifctrlgrp {
		fsl,pins = <
			MX6UL_PAD_LCD_CLK__LCDIF_CLK	    0x79
			MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
			MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
			MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
		>;
	};

	pinctrl_pwm2: pwm2 {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO09__PWM2_OUT   0x110b0
		>;
	};

	pinctrl_tsc: tscgrp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0xb0
			MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0xb0
			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0xb0
			MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0xb0
		>;
	};


LCD periphery configuration

Presented below device tree file snippet will configure LCD periphery to:

  • use LCD data & control pinout as defined above,
  • configure timings and resolution as required by Schematic, especially:
    • data bus width: 24bits,
    • data clock frequency: 30MHz,
    • horizontal resolution: 800px,
    • vertical resolution: 480px.
&lcdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lcdif_dat
		&pinctrl_lcdif_ctrl>;
	display = <&display0>;
	status = "okay";

	display0: display {
		bits-per-pixel = <32>;
		bus-width = <24>;

		display-timings {
			native-mode = <&timing0>;
			timing0: timing0 {
				clock-frequency = <30000000>;

				hactive = <800>;
				vactive = <480>;

				hfront-porch = <210>;
				hsync-len = <2>;
				hback-porch = <46>;

				vfront-porch = <22>;
				vsync-len = <2>;
				vback-porch = <23>;

				hsync-active = <1>;
				vsync-active = <1>;
				de-active = <1>;
				pixelclk-active = <0>;
			};
		};
	};
};

Touchscreen configuration

Presented below device tree file snippet will configure Touchscreen controller to:

  • use GPIOs defined above,
  • use GPIO1[4] (and GPIO1[3]) as X axis.
&tsc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_tsc>;
	status = "okay";
	xnur-gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
	measure_delay_time = <0xffff>;
	pre_charge_time = <0xfff>;
};

Backlight configuration

Presented below device tree file snippet will:

  • enable PWM2 periphery and configure it to use pinout defined above,
  • configure LCD backlight to use PWM2 periphery,
/ {
	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm2 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
		status = "okay";
	};
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	status = "okay";
	clocks = <&clks IMX6UL_CLK_PWM2>,
		<&clks IMX6UL_CLK_PWM2>;
};

Example

Complete device tree example with configured LCD periphery you can find here.

Drivers

For configuration like presented above please build kernel with following drivers enabled:

  • GPIO_MCP23S08 - Microchip MCP23xxx I/O expander,
  • FB_MXS - MXS LCD framebuffer support,
  • TOUCHSCREEN_IMX6UL_TSC - Freescale i.MX6UL touchscreen controller,
  • BACKLIGHT_PWM - Generic PWM based Backlight Driver,
  • PWM_IMX - i.MX PWM support.

Bindings documentation

For more details and available configuration options please read following documentation: