UART configuration

From liteSOM Wiki
Jump to: navigation, search

UART configuration

On i.MX6UL platform we can use up to eight independent UART peripherals:

  • uart1,
  • uart2,
  • uart3,
  • uart4,
  • uart5,
  • uart6,
  • uart7,
  • uart8.

Pinout configuration

Presented below device tree file snippet will configure pad:

  • UART1_TX/ENET1_RDATA02/I2C3_SCL/CSI_DATA02/GPT1_COMPARE1/GPIO1_IO16/SPDIF_OUT (pad 43 on liteSOM) as UART TX signal,
  • UART1_RX/ENET1_RDATA03/I2C3_SDA/CSI_DATA03/GPT1_CLK/GPIO1_IO17/SPDIF_IN (pad 45 on liteSOM) as UART RX signal,
&iomuxc {
	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX	0x1b0b1
			MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX	0x1b0b1
		>;
	};
};

UART periphery configuration

Presented below device tree file snippet will configure UART1 periphery to:

  • UART TX/UART RX pins as defined above.
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

Userspace device

All serial ports will be available from user space as /dev/ttymxcX devices.

Bindings documentation

For more details and available configuration options please read following documentation: